1. Technical Field
The present invention relates to overlay, and more particularly, to an overlay measurement apparatus and a method for performing overlay measurement.
2. Discussion of the Related Art
With the widespread adoption of computers and other electronic information devices, semiconductor devices such as memory storage devices have been developed to provide a high response speed and large storage capacity. Manufacturing technology has been designed to aid in the efficient fabrication of these modern semiconductor devices. This manufacturing technology may be able to fabricate semiconductor devices having a high degree of integration, reliability, fast response speed, etc.
In manufacturing semiconductor devices, providing for a high yield can help to keep manufacturing costs down. A high yield may be provided at least in part by employing an effective apparatus and approach for measuring process errors for one or more process steps that are involved in manufacturing.
In the photolithographic process, misalignment of photoresist patterns formed by exposure and development may be taken into consideration. Accurate alignment is becoming increasingly more difficult to ensure as the alignment margin decreases with the increasing integration density of semiconductor device, for example, as the aperture of a wafer increases and as the number of photolithographic process steps performed increases. Optimization of overlay measurement in checking the alignment of photoresist patterns formed on a wafer may be exploited to minimize or prevent misalignment error.